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CITATION

Sicard, Etienne and Bendhia, Sonia Delmas. Advanced CMOS Cell Design. US: McGraw-Hill Professional, 2007.

Advanced CMOS Cell Design

Authors: Etienne Sicard and Sonia Delmas Bendhia

Published:  March 2007

eISBN: 9780071509053 0071509054 | ISBN: 9780071488365
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  • Contents
  • Preface
  • Acknowledgments
  • Abbreviations and Symbols
  • 1. Technology Scale-down
  • 1.1 Recent Trends in CMOS Technology
  • 1.2 Introducing the 90 nm Technology
  • References
  • 2. Embedded Memories
  • 2.1 The World of Memory
  • 2.2 RAM Memory
  • 2.3 RAM Array
  • 2.4 Dynamic RAM Memory
  • 2.5 EEPROM
  • 2.6 Flash Memories
  • 2.7 Ferroelectric RAM Memories
  • 2.8 Memory Interface
  • References
  • Exercises
  • 3. A Very-Simple-Microprocessor
  • 3.1 Introduction
  • 3.2 Instructions
  • 3.3 Program Memory
  • 3.4 Executing Instructions
  • 3.5 Basic Block Design
  • 3.6 Conclusion
  • References
  • Exercises
  • 4. Field-Programmable Gate Array
  • 4.1 Introduction
  • 4.2 Configurable Logic Circuits
  • 4.3 Programmable Logic Block
  • 4.4 Interconnection Between Blocks
  • 4.5 Conclusion
  • References
  • Exercises
  • 5. Radio-Frequency Circuits
  • 5.1 Target Radio-Frequencies
  • 5.2 Inductor
  • 5.3 Power Amplifier
  • 5.4 Oscillators
  • 5.5 Phase-Lock Loop
  • 5.6 Frequency Converter
  • 5.7 Sub-sampling Frequency Converter
  • 5.8 Conclusion
  • References
  • Exercises
  • 6. Converters and Sensors
  • 6.1 Introduction
  • 6.2 Digital-Analog Converter Architectures
  • 6.3 Sample and Hold Circuits
  • 6.4 Analog-Digital Converter Architectures
  • 6.5 Temperature Sensor
  • 6.6 Image Sensors
  • 6.7 Conclusion
  • References
  • Exercises
  • 7. Input/Output Interfacing
  • 7.1 Power Supply
  • 7.2 The Bonding Pad
  • 7.3 The Pad Ring
  • 7.4 Input Structures
  • 7.5 Digital Output Structures
  • 7.6 Pull-up, Pull-down
  • 7.7 Low Voltage Differential Swing
  • 7.8 Power Clamp
  • 7.9 Core/Pad Limitation
  • 7.10 I/O Pad Description Using IBIS
  • 7.11 Connecting to the Package
  • 7.12 Signal Propagation Between Integrated Circuits
  • 7.13 Conclusion
  • References
  • Exercises
  • 8. Silicon on Insulator
  • 8.1 Introduction
  • 8.2 SOI Technology Issues
  • 8.3 SOI Device Model
  • 8.4 SOI Design
  • 8.5 The Tera-Hertz MOS Device
  • 8.6 Conclusion
  • References
  • Exercices
  • 9. Future and Conclusion
  • 9.1 Predicting the Unpredictable
  • 9.2 Conclusion
  • References
  • Appendix A: Design Rules
  • Lambda Units
  • Layout Design Rules
  • Pads
  • Electrical Extraction Principles
  • Node Capacitance Extraction
  • Resistance Extraction
  • Simulation Parameters
  • Technology Files for DSCH
  • Appendix B: MICROWIND31 Program Operation and Commands
  • Getting Started
  • List of Commands in MICROWIND31
  • Appendix C: DSCH31 Logic Editor Operation and Commands
  • Getting Started
  • Commands
  • Appendix D: Quick Reference Sheet
  • MICROWIND31 Menus
  • MICROWIND3.1 Simulation Menu
  • DSCH3.1 Menus
  • Silicon Tool
  • List of Files
  • File Organization
  • Appendix E: Interface to WinSpice
  • About WinSpice3
  • SPICE Syntax
  • Generate a SPICE File with DSCH3.1
  • Generate a SPICE File with MICROWIND3.1
  • References
  • Glossary
  • A
  • C
  • D
  • E
  • F
  • G
  • H
  • I
  • K
  • L
  • M
  • N
  • O
  • P
  • S
  • T
  • U
  • V
  • W
  • X
  • Z
  • Index